The task of level detection is to use an analog-to-digital converter (ADC) to convert the analog quantity into two digital quantities: "0" and "1". Generally, it can be composed of an operational amplifier with positive feedback; The task of logical judgment is to correctly send out switching signals UF and UR according to the output signals ut and UZ of the two level detectors after operation; After the logic judgment circuit sends out the switching instructions UF and UR, the switching instructions can only be executed after the locking delay tdb 1 and the opening delay tdt. The blocking delay tdb 1 is the waiting time between sending the switching command and actually blocking the original group of pulses, generally 2 ~ 3 ms, and the opening delay tdt is the waiting time between blocking the original working group pulse and opening another group of pulses, generally 5 ~ 7 ms The function of interlock protection is to ensure that under any circumstances, two groups of thyristors will not be triggered at the same time, that is, Ublf and Ublr will not be "1" at the same time.